IBM discloses Arm-compatible mainframe chip
+An Arm-compatible IBM mainframe wasn’t on your Hot Chips bingo card, was it?* Kicking off the annual processor-nerd confab, IBM disclosed the next-gen Z-series microprocessor will natively run 64-bit Arm code concurrently with traditional IBM mainframe software.
*Traditional* includes that accounting package your grandfather installed in the 1960s, because one of the many distinguishing Z Series features is backward compatibility. Other features include reliability, and not the five nines greasy kid stuff. We’re talking enough nines that an IBM mainframe will still be processing credit card transactions after monkeys dig the Statue of Liberty out of the sand.
Operating at 5.7 GHz., the processor integrates 11 CPU cores. Each has a massive L2 cache. As an aside, in a prebriefing, Arm talked about how important a large L2 cache is to performance, which is why its AGI chip has 2 MB per core. IBM’s 36 MB per-core L2 dwarfs that amount, evidence of the unusual demands that Big Blue addresses.
The concepts of virtualization and containerization popular today trace back to 1960s-era mainframes, and the new IBM microprocessor provides isolation through partitioning. Previously, Z/OS and Linux could run side-by-side in separate partitions. Now, through IBM’s isolation mechanisms and the Arm-compatibility mode, Arm-based Linux can run alongside Z-series Linux. Thus, a single machine can host mission-critical applications, such as transaction processing, and complementary, off-the-shelf server applications. Customers can modernize their back offices without decoupling their mainframes from newer infrastructure.
(*Or did you see the companies' April announcement?)
